Education

University of Cambridge

Ph.D. in Computer Science

January 2014 - June 2017

Research Focus

Specialized in Computer Architecture with a focus on Fault Tolerant Processors and Circuit Simulation.

Key Achievements

  • Built processor architectures tolerant to faults using Gem5
  • Developed an event-driven fast circuit simulator outperforming research-based simulators
  • Supervised 50+ students in C/C++ programming, Databases, Computer Design, and Concurrent Systems

Research Impact

Research work has contributed to the field of fault-tolerant computing and high-performance circuit simulation.

Previous Education

Master of Science by Research in Computer Science

July 2008 - July 2010

International Institute of Information Technology, Hyderabad, India

  • Research Assistant at NVIDIA Center of Excellence
  • Published 4 first-author papers on Graph Algorithms on GPUs
  • Worked on parallelizing GIS and Graph theoretical applications on CellBE
  • Teaching Assistant for Parallel Programming